Production method for thin-film crystal wafer, semiconductor device using it and production method therefor

ABSTRACT

The n + -GaAs layer  8  of the GaAs single crystal  10  is formed by epitaxial growth, followed by epitaxially growing the Si-layer  11  in the same epitaxial growth furnace, and then the aluminum electrode  12  is formed on the Si-layer  11  as an ohmic electrode. The Si-layer  11  can suppress the formation of a surface defect level on the surface of the n + -GaAs layer  8  and can effectively prevent the formation of an unnecessary potential barrier. Since the Si-layer  11  has a smooth surface and is excellent in chemical stability, a good ohmic electrode can be obtained by forming the electrode  12  using aluminum or the like has a suitable work function to the Si-layer  11.

TECHNICAL FIELD

The present invention relates to a method for producing semiconductorwafers excellent in surface stability, and to semiconductor devices withgood ohmic electrode properties using the same and a method forproducing the semiconductor devices.

BACKGROUND ART

III-V group compound semiconductor crystals such as GaAs, GaP and GaNare widely used for the production of semiconductor devices such ashigh-speed electron devices used in a high-frequency region of microwavebands or higher, or light-emitting devices such as variouslight-emitting diodes. When the compound semiconductor crystals asdescribed above are used to produce semiconductor devices, electricalproperties of the semiconductor crystal itself is naturally important.However, from the viewpoint of device applications, electricalproperties of the electrode part for electrically connecting thesemiconductor crystal to external devices are also important. In otherwords, formation of electrodes that can obtain ohmic connection capableof efficiently flowing current between the same and external devices hasbecome an important technical problem.

Generally, the conduction band level or valence band level insemiconductors is often different from the work function of electrodemetals. Therefore, through electrodes smoothly, it is necessary toselect an electrode material that has a work function compatible withthe band structure of a target semiconductor layer.

However, even when the electrode material to be mounted on asemiconductor crystal is selected from the viewpoint as described above,there is a problem that instability at the surface of the semiconductorcrystal causes a potential barrier to form, and that the barrierinhibits a smooth flow of current. For example, in the case of a GaAscompound semiconductor, a high-density surface defect level isspontaneously formed; the Fermi level is fixed near the surface defectlevel; and the surface defect level is formed in a forbidden band.Consequently, a depletion layer that becomes a potential barrier isoften formed near the surface. This means that a certain depletion layerforms whichever electrode metal is used. Therefore, the depletion layermakes it practically difficult to obtain ideal ohmic properties even ifan electrode material is suitably selected.

In order to address this problem, the following configurations have beendevised and are well known: a configuration in which a crystal layersuch as InGaAs, which has a small forbidden band width and a smallpotential barrier, is formed between a semiconductor crystal and anelectrode as an electrode connecting layer to reduce the energy gapbetween the electrode and the semiconductor crystal; or a configurationin which an abundance of impurities are added so that the thickness of adepletion layer is reduced to the extent that the current from anelectrode smoothly flows to a semiconductor crystal by the tunneleffect, by using the fact that the thickness of a depletion layer isreduced by increasing the concentration of impurities.

However, when an InGaAs layer is provided as an electrode connectinglayer, the InGaAs layer or the like is formed on a GaAs layer which isformed on the top layer of a semiconductor crystal, wherein the InGaAslayer has a different lattice constant from that of the GaAs layer.Consequently, undue compression or tensile stress acts on the inside ofa finished semiconductor device. This causes distortion to form orsurface morphology to deteriorate, in turn causing a break in a wire orother problems to a fine patterning. On the other hand, when thethickness of a depletion layer which forms a potential barrier isreduced by adding a large amount of impurities, thermal stability of asemiconductor will be impaired, resulting in instability of theoperation of a finished semiconductor device and reduction inreliability of the operation thereof.

DISCLOSURE OF THE INVENTION

An object of the present invention is to provide a method for producingsemiconductor wafers excellent in surface stability, and to providesemiconductor devices with good ohmic electrode properties using thesame and a method for producing the semiconductor devices, whereby theabove described problems in conventional technology can be solved.

In order to solve the above described problems, the present inventionhas made it possible to obtain a semiconductor laminate structureexcellent in surface stability and having good ohmic electrodeproperties by laminating a Si-layer with an appropriate crystalstructure on a III-V group compound semiconductor single crystal such asGaAs.

The present invention is described as follows:

(1) A semiconductor device using a III-V group compound semiconductorsingle crystal comprising a doped III-V group compound semiconductorsingle crystal epitaxial layer, a Si-layer formed on the above describedIII-V group compound semiconductor single crystal epitaxial layer, and ametal electrode formed on the above described Si-layer as an ohmicelectrode.

(2) The semiconductor device according to the above (1), wherein theabove described III-V group compound semiconductor single crystalepitaxial layer is n-type doped, and the above described metal electrodeis an ohmic electrode for electrons.

(3) The semiconductor device according to the above (1), wherein theabove described III-V group compound semiconductor single crystalepitaxial layer is p-type doped, and the above described metal electrodeis an ohmic electrode for holes.

(4) The semiconductor device according to any of the above (1) to (3),wherein the above described III-V group compound semiconductor singlecrystal is a single crystal composed of any one selected from the groupconsisting of GaAs, InGaAs and InP.

(5) The semiconductor device according to any of the above (1) to (4),wherein the above described Si-layer is a single crystal layerepitaxially grown on the above described III-V group compoundsemiconductor single crystal epitaxial layer.

(6) The semiconductor device according to any of the above (1) to (4),wherein the above described Si-layer is formed on the above describedIII-V group compound semiconductor single crystal epitaxial layer as apolycrystalline layer or an amorphous layer.

(7) The semiconductor device according to any of the above (1) to (6),wherein the above described metal electrode comprises aluminum.

(8) A method for producing a thin film crystal wafer for a III-V groupcompound semiconductor device, comprising the steps of:

laminating required compound semiconductor thin film crystal layers on asemiconductor substrate semiconductor single crystal; and

forming a Si-layer on the above described III-V group compoundsemiconductor single crystal by epitaxial growth,

wherein the above described steps are performed in a same epitaxialgrowth furnace.

(9) The method according to the above (8), wherein the above describedepitaxial growth is performed by a metal organic vapor phase epitaxymethod (MOVPE method) or a molecular beam epitaxy method (MBE method).

(10) The method according to the above (8), wherein the above describedIII-V group compound semiconductor single crystal is a GaAs singlecrystal.

(11) The method according to the above (8), wherein, when the abovedescribed Si-layer is formed, a thin film layer of the above describedIII-V group compound semiconductor single crystal to be joined to theabove described Si-layer is n-type doped with Si.

(12) The method according to the above (8), wherein the above describedsemiconductor single crystal contains As, and, when the above describedSi-layer is formed, the above described Si-layer is n-type doped with Asin a thin film crystal layer of the above described III-V group compoundsemiconductor single crystal to be joined to the above describedSi-layer.

(13) The method according to any of the above (8) to (12), wherein theabove described Si-layer is formed as a single crystal layer, apolycrystalline layer or an amorphous layer.

(14) A method for producing a semiconductor device using a III-V groupcompound semiconductor single crystal, comprising the steps of:

laminating required compound semiconductor thin film crystal layers on asemiconductor substrate by epitaxial growth to obtain a III-V groupcompound semiconductor single crystal;

forming a Si-layer on the above described III-V group compoundsemiconductor single crystal by epitaxial growth,

wherein the above described steps are performed in a same epitaxialgrowth furnace; and then

forming a metal electrode acting as an ohmic electrode on the abovedescribed Si-layer.

By forming a Si-layer on a III-V group compound semiconductor singlecrystal epitaxial layer, it is possible to suppress the formation of asurface defect level on the surface of the III-V group compoundsemiconductor single crystal epitaxial layer and to effectively preventan unnecessary potential barrier to be formed. Since the Si-layer has asmooth surface and is excellent in chemical stability, it is possible toobtain a good ohmic electrode by forming an electrode using a metalhaving a suitable work function to the Si-layer, for example, aluminumor the like.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a sectional view showing an exemplary embodiment of asemiconductor device according to the present invention.

BEST MODE FOR CARRYING OUT THE INVENTION

An exemplary embodiment of the present invention will now be describedin detail with reference to the drawing.

FIG. 1 shows an exemplary embodiment of a semiconductor device accordingto the present invention in a sectional view. The semiconductor deviceshown in FIG. 1 is a hetero-junction bipolar transistor (HBT) 1 that isbuilt using a III-V group compound semiconductor crystal. HBT 1 is builtusing a GaAs single crystal 10, which is a III-V group compoundsemiconductor single crystal for HBT having a known configuration, andby which it functions as an HBT device. The GaAs single crystal 10 ismanufactured by successively laminating, on a GaAs substrate 2, a bufferlayer 3, an n⁺-GaAs layer (conductive layer) 4, an n-GaAs layer(collector layer) 5, a p-GaAs layer (base layer) 6, an n-InGaP layer(emitter layer) 7, an n⁺-GaAs layer (emitter cap layer) 8, in anappropriate epitaxial growth furnace, by an appropriate epitaxial growthmethod such as a metal organic vapor phase epitaxy method (MOVPE method)or a molecular beam epitaxy method (MBE method).

The n⁺-GaAs layer 8 which is the top layer of the GaAs single crystal 10is an n-type doped GaAs layer, which corresponds to an (n-type) “dopedIII-V group compound semiconductor single crystal epitaxial layer” inthe present invention. The Si-layer 11 is formed by lamination on then⁺-GaAs layer 8 for providing an emitter electrode as an ohmic electrodeabove the n⁺-GaAs layer 8. The electrode layer 12 composed of aluminum(Al) is formed on the Si-layer 11 as the ohmic electrode for electrons.

Formation of the Si-layer 11 by lamination on the n⁺-GaAs layer 8 thatis chemically unstable and is apt to form a surface defect level caneffectively prevent a potential barrier such as a depletion layer fromforming in the n⁺-GaAs layer 8. Moreover, formation on the Si-layer 11of the aluminum electrode 12 that can obtain a good ohmic connection toSi establishes a good ohmic connection between the electrode 12 and then-InGaP layer (emitter layer).

Generally, GaAs crystals are rapidly oxidized in air, and a depletionlayer formed by the disorder of the crystal surface at the oxidationallows a high-density surface level to form, which prevents theformation of a good ohmic electrode. Therefore, it is possible to form aSi/GaAs hetero-junction without allowing the unstable surface level toform, by growing the n⁺-GaAs layer 8 in an epitaxial growth furnacefollowed by epitaxially growing the Si-layer 11 in the same epitaxialgrowth furnace by the MOVPE method, the MBE method or the like.

Specifically, preferably, on the GaAs substrate 2, the buffer layer 3through the n⁺-GaAs layer (emitter cap layer) 8 are successively formedby lamination in an appropriate epitaxial growth furnace by anappropriate epitaxial growth method such as the MOVPE method, the MBEmethod or the like to form the GaAs single crystal 10, and subsequentlya Si raw material such as silane (SiH₄) or disilane (Si₂H₆) is suppliedto the same epitaxial growth furnace and thermally decomposed by theabove described appropriate epitaxial growth method, the resulting Sibeing grown on the n⁺-GaAs layer 8 to form the Si-layer 11. Here, theSi-layer 11 is preferably formed as a single crystal layer that isepitaxially grown on the n⁺-GaAs layer 8, a GaAs crystal. However, theSi-layer 11 is not limited to be formed as a single crystal layer, butmay be formed in a polycrystalline or amorphous form.

Here, the Si-layer 11 is preferably n-type doped with As, P or the likein order to make the ohmic connection more effective, in considerationof the Fermi level that is fixed near the surface defect level.Moreover, the Si-layer 11 desirably, but not critically, has a thicknessin the range from several tens angstroms to several hundreds angstroms.For similar reasons, it is desirable that the n⁺-GaAs layer 8 besubjected to the n-type doping.

Although there is a little difference of the energy level at the end ofa conduction band between GaAs and Si, the difference is so small thatthe junction resistance thereof can be made negligibly small byperforming n-type doping of the Si-layer 11 and the n⁺-GaAs layer 8 asdescribed above. The n-type doping can be performed for the n⁺-GaAslayer 8 and the Si-layer 11 using a suitable means for each layer.However, without performing an intentional doping, mutual diffusion byheating between the n⁺-GaAs layer 8 and the Si-layer 11, when theSi-layer 11 is formed on the n⁺-GaAs layer 8, allows the amount ofdoping with a sufficient concentration in each layer to be achieved.

Since the Si-layer 11 has a very stable surface and a small surfacelevel, a good ohmic connection can be achieved between the Si-layer 11and the electrode 12 by using aluminum that is a metal having a suitableelectron affinity, in the manner similar to the Si semiconductortechnology. As a result, the GaAs single crystal 10 can be electricallyconnected to external devices through the electrode 12 to achieve a goodohmic connection of the both.

The configuration of an emitter electrode was described in the abovedescribed embodiment, but a good ohmic electrode can be providedsimilarly in the cases of a base electrode to a base layer and acollector electrode to a collector layer. Moreover, the semiconductordevice according to the present invention is not limited to HBT devices,but as a matter of course, it may be widely applied to light-emittingdiode devices, HEMT devices and the like.

The above described embodiment described the case in which the III-Vgroup compound semiconductor single crystal epitaxial layer is n-typedoped and the metal electrode is the ohmic electrode for electrons.

On the other hand, the present invention can be similarly applied to thecase in which a III-V group compound semiconductor single crystalepitaxial layer is p-type doped and a metal electrode is the ohmicelectrode for holes, and thereby similar effect can be obtained.

INDUSTRIAL APPLICABILITY

According to the present invention, it is possible to effectivelyprevent an unnecessary potential barrier to be formed and to form a goodohmic connection between a Si-layer and an electrode by forming aSi-layer on a III-V group compound semiconductor single crystalepitaxial layer. As a result, it is possible to efficiently flow currentbetween the III-V group compound semiconductor single crystal andexternal devices through the electrode.

1. A semiconductor device using a III-V group compound semiconductorsingle crystal comprising: a doped III-V group compound semiconductorsingle crystal epitaxial layer; a Si-layer formed on said III-V groupcompound semiconductor single crystal epitaxial layer; and a metalelectrode formed on said Si-layer as an ohmic electrode.
 2. Thesemiconductor device according to claim 1, wherein said III-V groupcompound semiconductor single crystal epitaxial layer is n-type doped,and said metal electrode is an ohmic electrode for electrons.
 3. Thesemiconductor device according to claim 1, wherein said III-V groupcompound semiconductor single crystal epitaxial layer is p-type doped,and said metal electrode is an ohmic electrode for holes.
 4. Thesemiconductor device according to any one of claims 1 to 3, wherein saidIII-V group compound semiconductor single crystal is a single crystalcomposed of any one selected from the group consisting of GaAs, InGaAsand InP.
 5. The semiconductor device according to claim 1, wherein saidSi-layer is a single crystal layer epitaxially grown on said III-V groupcompound semiconductor single crystal epitaxial layer.
 6. Thesemiconductor device according to claim 1, wherein said Si-layer isformed on said III-V group compound semiconductor single crystalepitaxial layer as a polycrystalline layer or an amorphous layer.
 7. Thesemiconductor device according to claim 1, wherein said metal electrodecomprises aluminum.
 8. A method for producing a thin film crystal waferfor a III-V group compound semiconductor device, comprising the stepsof: laminating required compound semiconductor thin film crystal layerson a semiconductor substrate by epitaxial growth to obtain a III-V groupcompound semiconductor single crystal; and forming a Si-layer on saidIII-V group compound semiconductor single crystal by epitaxial growth,wherein said steps are performed in a same epitaxial growth furnace. 9.The method according to claim 8, wherein said epitaxial growth isperformed by a metal organic vapor phase epitaxy method (MOVPE method)or a molecular beam epitaxy method (MBE method).
 10. The methodaccording to claim 8, wherein said III-V group compound semiconductorsingle crystal is a GaAs single crystal.
 11. The method according toclaim 8, wherein, when said Si-layer is formed, a thin film layer ofsaid III-V group compound semiconductor single crystal to be joined tosaid Si-layer is n-type doped with Si.
 12. The method according to claim8, wherein a thin film layer of said compound semiconductor singlecrystal contains As, and, when said Si-layer is formed, said Si-layer isn-type doped with As in a thin film crystal layer of said III-V groupcompound semiconductor single crystal to be joined to said Si-layer. 13.The method according to any one of claims 8 to 12, wherein said Si-layeris formed as a single crystal layer, a polycrystalline layer or anamorphous layer.
 14. A method for producing a semiconductor device usinga III-V group compound semiconductor single crystal, comprising thesteps of: laminating required compound semiconductor thin film crystallayers on a semiconductor substrate by epitaxial growth to obtain aIII-V group compound semiconductor single crystal; forming a Si-layer onsaid III-V group compound semiconductor single crystal by epitaxialgrowth, wherein said steps are performed in a same epitaxial growthfurnace; and then forming a metal electrode acting as an ohmic electrodeon said Si-layer.